Forum Discussion
Altera_Forum
Honored Contributor
9 years agoOK I tried it with the original system verilog source and instantiate 1200 of them.
Some Ports from the DE4 Board (Buttons and Switches) have these ROs in their Fanout. The Technology Map Viewer shows absolutely nothing connected to these Ports. So everything that was there got removed, including the ROs of course. So at least I could narrow down the problem, and it doesn't seem to be a logic merging problem.