Forum Discussion
Altera_Forum
Honored Contributor
12 years agoI just tried this small example
entity top is
end;
library IEEE;
use IEEE.std_logic_1164.all;
architecture arch of top is
begin
process
begin
wait for 1 ns;
report "message 1";
wait for 1 ns;
report "message 2";
wait for 1 ns;
wait;
end process;
end; Using these commands vlib work
vcom report.vhd
vsim -i top -msgmode both -do "run -all"
And it works for me. Can you try this and show us your script and transcript. // Questa Sim# // Version 10.2a win32 Mar 15 2013# //# // Copyright 1991-2013 Mentor Graphics Corporation# // All Rights Reserved.# //# // THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION# // WHICH IS THE PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS# // LICENSORS AND IS SUBJECT TO LICENSE TERMS.# //# vsim -do {run -all} -i -msgmode both top # Loading std.standard# Loading std.textio(body)# Loading ieee.std_logic_1164(body)# Loading work.top(arch)#1# run -all # ** Note: message 1# Time: 1 ns Iteration: 0 Instance: /top# ** Note: message 2# Time: 2 ns Iteration: 0 Instance: /top