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Altera_Forum
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15 years ago

no failure or wainings reports in QUARTUSII for an obvious syntax error

i did not use the definition of register array ,reg [m-1:0] mem[n-1:0]; so when i assign them with original constant value with assign mem[0] = .....;then there were errors reports, and i modified th...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

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I know there is no this type of data definition for memory array with "wire[15:0] mem [16:0];"

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It's legal Verilog syntax. Just have a look on the IEEE 1364 Verilog specification, paragraph 4.9 Arrays. It has this example: 

wire  y; 8-bit-wide vector wire indexed from 0 to 7