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Altera_Forum's avatar
Altera_Forum
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15 years ago

No EPCS Layout Data

Hi all,

I'm a newcomer to FPGA design - I have only been working with Altera's tools for a month or two. Excuse any 'noobness'.

I'm working on a custom board that is designed around the Cyclone III (EP3C25F324) FPGA. The board also has a serial flash memory device (EPCS16S18N), which is the 16 MBit serial flash configuration device. I was attempting to write a few small applications to test our ability to update flash memory, as well well as configure on power up it.

Here is what I have:

  • A .sof containing a NIOS II processor and an EPCS controller. It has a few other peripherals like a RS232 serial port.

  • A small application that prints hello world over the RS 232 port.
I tested this using the NIOS II tools in eclipse - successfully programmed the FPGA and saw the application print hello world on the serial port. That stuff is good to go.

Time to move on to updating flash memory.

  • I first used Qaurtus Programmer to update the FPGA with the .sof (since it contains the necessary components to access flash memory).

  • I then started the NIOS II Flash Programmer GUI

  • I selected the bsp settings file which populated most of the interface

  • I was able to successfully select the hardware connection (USB-Blaster)

  • I added both the .sof and .elf images and attempted to program the flash memory
Part way through the process the programmer fails - the output from the operations show that the programmer makes it up to locating valid registers for the flash memory. It then fails stating that EPCS signature and ID are zero followed by a statement that "no EPCS Layout Data" was available.

As far as I can tell, it looks like the flash chip is supposed to be able to respond or be queried for geometry.

Any ideas?

Regards,

Seth

9 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Yes, the nios2-flash-programmer knows which registers to query inside the EPCS device to determine what the organization of the flash is (blocks, pages, etc.). It needs this information primarily to know how to perform erases.

    Are you sure it's an Altera EPCS16 device and not a STMicro or Numonyx part?

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Sorry for the late response - I was out of the office for a bit. I double checked the actual part - it is an Altera EPCS16SI8N. That should be supported by the programmer without having to resort to the override files that can be used with the 3rd party memory. I'm going to try a new flash memory chip this afternoon and update the thread with whatever I find.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Thanks again for the response Jakob. The issue turned out to be a bad flash chip - we soldered a new one on the board and were able to successfully program the flash.

    Cheers!
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Be warned for bad EPCS chips. Especially EPCS16. See several recent threads.

    Maybe someone from Altera can give a comment on this issue if he/she reads this.

    Cheers, Ton
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    I will re-iterate what std_logic_vector has stated. There can be knock-offs out there. You might want to check with your board-house to verify that they are not getting parts from the black market.

    It could of course just be a bad part, but man that is extremely rare.

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    I am having the same problem of NoEPCS Layout, however we are using a Altera EPCS16.

    The Flash and the board are Ok, because if I add on Quartus the Serial Flash Programer, from the wizard it works correctly identifies it as EPCS16 and I am able to use it.

    But not if it is done trough the

    SOPC

    NIOS

    onchip_ram

    epcs_flash_controller.

    Any ideas?

    I will post my original thread here so that you can have more information about this porblem

    Thankyou!
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    I'm a little confused as to what was working for you. I can explain what I saw when I used the serial flash programmer from the command line.

    I had a distribution that contained and .elf, .sof, .cdf and .jic files. I was using the serial flash programmer from the command line. The programmer would actually claim that it successfully updated the flash - however, after a reset the FPGA was unable to configure from the flash device. In other words, the serial flash programmer is not a good way to tell if the flash chip is OK.

    Are you in a position to try a new chip on your board?

    Regards,

    Seth
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    I solve the Problem, It seems it was something wrong on the pin asignments, I follow the recomendations in this Thread

    http://www.alteraforum.com/forum/showthread.php?t=21769&highlight=no+epcs+layout+data

    On Quartus, after inserting the sopc component, and puting the pins on it,

    the asignments were made, and what it was missing. is to Change In 'Device and pin options' the 'Dual purpose pins' from 'Input tristate' to 'Regular I/O'.

    I could not find any documentation saying that this should be done, but it was working for me after recompiling with this option selected.

    Thankyou!
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Good you got that figured out ;) I don't have enough experience with these tools to have guessed to go that direction. Thanks for posting your solution - at least it might help someone else down the road.

    Cheers,

    Seth