Newbie TCl scripting

Take a look at the Tcl script I wrote for the Arria V Transceiver Toolkit example

https://www.ovro.caltech.edu/~dwh/correlator/cobra_docs.html

I'm pretty sure there is a loop that runs through the various PHYs and runs the synthesis for each one. If its not in there, I might be thinking of another example ... either way, the Tcl is nice, so you'll be able to figure it out. If not, ask, and I'll give you some suggestions.

10ns clock period is only 100MHz. If you cannot meet that with HDL code, chances are you have bad code. Rather than try to tweak the clock period, you should look at the top failing paths and see if the code in that path can be improved, eg., by cutting paths with registers (pipelining your logic).

Cheers,

Dave