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Altera_Forum
Honored Contributor
15 years agoLee,
Am I right that you are in fact using a FT232 chip but then in FT245 synchronous style? I had to search a bit before I found that application note. One way to go is to make sure that the IO data for output is registered, e.g. being the registered output of a FIFO. Another way is to add a register to everything that goes to the FT-chip. This will meet timing. But not function as you now may write when the FT-chip signals full. The idea is that you now recognize such a 'MISSED_WRITE' and modify your writing state machine to cope with that and re-submit that not-written data when the flag goes inactive again. BTW you don't have to declare a virtual clock, you can use the incoming clock to specify the output delays. Good luck! Josy