Forum Discussion
Altera_Forum
Honored Contributor
12 years agoLots of problems with the code. You can clearly see you've come from a C/Java background
I suggest starting again, as the style of the code is not suitable for FPGA implementation. HDL stands for hardware description language. Your code doesnt look like its going to produce any useful hardware. I suggest starting again - start with a peice of paper and draw your circuit. How do you expect to write the code if you dont know roughly what the circuit should be? Only then should you write the HDL. Forget all your C/Java skills for now. VHDL is completly different. And Note: & is concatenate in VHDL, not a logical operator.