Negative Set Up time in Timing report

It is perfectly ok for a uTsu to be negative. The reason has to do with Software modeling:

- The boundary of the software model may not be exactly the same as the register in the HW. For modeling reasons, Quartus developers can move the 'data' and/or 'clk' pins to match the software representation. There can be additional delay between the point Quartus considers the 'clk' pin or the register, and the actual HW register itself. The model is still 100% accurate and the difference is all about considering 10ps as routiing delay on the clk pin, or part of register uTsu (numbers are just examples). At the end, the uTsu is basically:

uTsu = delay from model's data pin to ideal register

- delay from model's clk pin to ideal register

+ ideal uTsu

- In order for Altera to ensure that TimeQuest or Classic report the worst case slack, Quartus develops sometimes need to add additional guard bands. This guard bands can some times show in funny ways. This is more so in Classic where Rise/Fall differences are not modeled.

So, don't worry too much about the uTsu and just look at your path's total slack. It will be correct.