Need help with Quartus + Altera-ModelSim

Hi,

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I can compile in Quartus but I can't simulate the .vho file in ModelSim

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A successful compilation in Quartus is a great thing for someone new to Quartus. (and even robust designers).

to simulate .vho file, You must compiile it in ModelSim, I think, and simulate with menu Simulate...>Start Simulation...> Resolution = "ps".

.vho are VHDL file generated by Quartus with all delays which make simulation very long (huge calculation) and it usually doesn't help.

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I can simulate a VHDL file in ModelSim that was NOT compiled in Quartus./QUOTE]

Quartus only compiles "synthetisable" design. "after" clauses are ignored... Are you new to VHDL ?

In my opinion, you will find some great "getting started" and tutorial guides, examples over the web. Go on www.altera.com/literatures.

This is for simulation only.

Later,

For a design to be implemanted, you have to assign pins of the FPGA (or CPLD) and others thing.

I advice you to use "Inputs tri-stated" for pins that do not drive logic (project settings).

Good luck.