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Altera_Forum's avatar
Altera_Forum
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14 years ago

need help please.. Urgent

I had to design a simple 4-bit calculator for my assignment. In the calculator, I had used shift register for the memory part. After I completed the entire circuit, everything works well and I c...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

your output Q shows acceptable degree of bus skew. delay must be there in timing sim. with respect to clock(tCO of register at least). you dont expect timing and functional sim to be same in term of such delays