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Altera_Forum
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14 years ago

Need help for constraining 12-bit serial ADC

I'm using an ADC12DS080, a 80MHz 12-bit serial ADC. It has 2 channels per an input so that every edge of the frame clock I get a new sample. I use the data_clk as the DDR input clock and I believe I ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

If fractions is the issue then use frequency directly:

create_clock -period "40 MHz" [get_ports ...]