Need help for constraining 12-bit serial ADC

There's a TQ user guide I put together on www.alterawiki.com(just click on Populer Pages and it's about the 10th one down). I think the second chapter is on clock relationships, and might help show why this occurs. Right now you've described two clocks with period that never line up. I know it seems like they're "close enough", but TimeQuest never does that for independent clocks.

Another option would be to make one a generated clock. You'd get a warning that it can't find a connection from the master, which is fine. THe benefit of a generated clock is that you can do -divide_by 6 or something like that, and it then knows that even if it rounds to 3 digits and they no longer line up, that it's still a 6x multiple on period. But I think what you currently have is the most straightforward.