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ugro's avatar
ugro
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2 years ago

NativeLink RTL-Simulation fails after Fitter-Run if project includes two variations of GPIO Lite IP

Hi, RTL-Simulation with Questa Intel Starter FPGA Edition using Nativelink fails under following conditions: there are two variations of the GPIO Lite Intel FPGA IP core included; any task other ...
Simulation
RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
2 years ago

It might be a potential bug and I will confirm this with the engineering.

1) Run Analysis & Synthesis ->RTL simulation Passed.
2) Run Analysis & Synthesis, Then Run Fitter -> RTL simulation Error.
3) Run Fitter directly -> RTL simulation Passed.

Case (3) is particularly interesting as it works after fitter stage. I recommend avoiding situation (2) as a workaround.

FYI, in cases where this error arises in Quartus Standard, we can only provide a workaround unless there's no available solution.

Thank you for your understanding.

Regards,

Richard Tan