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Altera_Forum
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8 years ago

Multiple RAM with different mif file

Hi all, I am doing a project to design 128 processors with a RAM in each processor. Every thing is the same but the initial data in the RAM. The design of the RAM is using the on chip memory. I...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

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Thank you for your help.

Did you means after generate a general ram file called ram.vhd via wizard, and copy the port to the top level module as a component. Then some how map the mif file to the corresponding ram in the top level module?

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No, read that ram.vhd and it calls up another ram (in verilog or tdf...) but its interface called up is there. (just like surgeon opening abdomen!, taking out what he needs for biopsy)