Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHi,
I think you could operate in this way: first of all you have to constaint your clock signal with the two different frequency, like this: create_clock –name clk_high –period 10.0 [get_ports clk] create_clock –name clk_low –period 40.0 [get_ports clk] –add the option -add allows you to set a double constraint in the same signal. Then set a clock exclusive group, because you use only a frequency at a time: set_clock_groups –exclusive -group {clk_high} -group {clk_low} For the module that works only with the low frequency, you could redefine a generated clock from the clk_low at the input pin clock of this module: create_generated_clock -name {clk_low_module} -source [get_ports {clk}] -master_clock {clk_low} [get_pins {low_module|input_clock}] -add That's only an idea, you have to try. bye