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I am still learning the syntax and rules of TimeQuest but I believe your command should be like this:
set_multicycle_path -setup -end -from [get_pins reg1|clk] -to [get_pins reg2|*] 4
As indicated by altera example for two register path(TimeQuest design examples). Your example is more like that for one clk...
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In "proper" SDC, yes, you constraint from a clock pin to a data pin as shown. You can, of course, drop the -from if you want to constraint all paths to the register. However, TimeQuest also allows you to specify the register itself as opposed to the data pins using the get_registers command, as timbenneckenstein has done. Therefore, the constraint is perfectly valid.
However...
The multicycle constraint is likely catching the enable signal from the FSM as well, and that path is likely a single-cycle path. You can correct it with an additional multicycle, such as:
set_multicycle_path -to [get_pins SINK_DFF|ena] -setup -end 1
set_multicycle_path -to [get_pins SINK_DFF|ena] -hold -end 0
Or you can make your multicycles more restrictive by specifying the -from nodes.
Or use the clock-enable multicycle example at:
http://www.altera.com/support/examples/timequest/exm-tq-clock-enable.html
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