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Altera_Forum's avatar
Altera_Forum
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11 years ago

module cannot be declared more than once

After generating the .qsys file when I am trying to run the top module verilog file in quartus II it is giving error :Error (10228): Verilog HDL error at gmmpipe.v(6): module "gmmpipe" cannot be decl...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

I agree with Galfonz

I have checked verilog files.

I did not find multiple declaration of gmmpipe twice.

follow Galfonz's instruction.