Altera_Forum
Honored Contributor
10 years agoModelsim Warning Hold Violation
I have a design that full compile without timing errors in TimeQuest but when I do gate level simulation I get:
# Expected := 0.157 ns; Observed := 0.116 ns; At : 7740.295 ns# Time: 7740295 ps Iteration: 1 Instance: /schematic_tb/uut/my_signal..# ** Warning: */DFFEAS HOLD High VIOLATION ON DATAIN WITH RESPECT TO CLK; a lot of times at different time Why? Should I do something? With TimeQuest I haven't hold violations. Thanks PS: Quartus 13.0 SP1, ModelSim Altera Starter 10.1d, Cyclone IV E (DE0-Nano)