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Altera_Forum
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10 years ago

Modelsim Warning Hold Violation

I have a design that full compile without timing errors in TimeQuest but when I do gate level simulation I get: # Expected := 0.157 ns; Observed := 0.116 ns; At : 7740.295 ns# Time: 7740295...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

I just solved. With Design Assistant I found reset signal that are async and caused this problem during simulation that was not catched by TimeQuest.

Thank you anyway