Altera_ForumHonored Contributor10 years agoModelsim Warning Hold Violation I have a design that full compile without timing errors in TimeQuest but when I do gate level simulation I get: # Expected := 0.157 ns; Observed := 0.116 ns; At : 7740.295 ns# Time: 7740295...Show More
Altera_ForumHonored Contributor10 years agoDo you have time specs for these registers? Are they async latches?
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