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Altera_Forum's avatar
Altera_Forum
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15 years ago

ModelSim "True Dual Port" Memory viewer weird

Hi everyone. I have a question for you all. I have a FPGA VHDL design using Cyclone III, in my design I used internal memory configured as true dual port RAM. I created the VHDL code, simu...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hi darkwave,

On ModelSim simulation window, on the left side, there is memory tab, it is internal memory viewer for simulation. On it's tab, there are two list, it is m_mem_data_a (for port A) and m_mem_data_b(for port B ), when I said "I tried open window form Port B" I mean I clicked the m_mem_data_b so a windows displaying the content of internal memory appear.

I use ModelSim with VHDL testbench.

Hi Tricky,

So It is for modeling only. Now I don't worry again.

Anyway, Thanks for both of you. I appreciate all of your help...:) :) :)