Forum Discussion
Altera_Forum
Honored Contributor
9 years agoAre you sure that the file has an "*.exe" extension under Linux?
I searched the installation directory for the *modelsim* keyword... Here is a list of the files: -------------------------------------------------------------------------------------------------------- ./16.1/ip/altera/posphy_l4/lib/pl4/hw/src/test/util/run_modelsim_vhdl.erp ./16.1/ip/altera/posphy_l4/lib/pl4/hw/src/test/util/run_modelsim.tcl.erp ./16.1/ip/altera/posphy_l4/lib/pl4/hw/src/test/util/run_modelsim_verilog.erp ./16.1/ip/altera/seriallite_ii/lib/slite2/hw/src/test/tb.demo/run_modelsim.tcl.erp ./16.1/ip/altera/seriallite_ii/lib/slite2/hw/src/test/tb.demo_vhdl/run_modelsim_vhdl.tcl.erp ./16.1/ip/altera/sdi/simulation/modelsim ./16.1/ip/altera/sdi/simulation/modelsim/trsdi_c4gx/pll_reconfig/modelsim ./16.1/ip/altera/sdi/simulation/modelsim/trsdi_c4gx/channel_reconfig/modelsim ./16.1/ip/altera/sdi/simulation/modelsim/trsdi_av/modelsim ./16.1/ip/altera/sdi/simulation/modelsim/trsdi_sv/modelsim ./16.1/ip/altera/altera_xcvr_att_custom/sv/modelsim_example_script.tcl ./16.1/ip/altera/rapidio/lib/rio/hw/src/test/tb.demo/run_modelsim.tcl.erp ./16.1/ip/altera/rapidio/lib/rio/hw/src/test/tb.demo/run_modelsim_verilog.erp ./16.1/ip/altera/rapidio/lib/rio/hw/src/test/tb.ser_demo/run_modelsim_vhdl.erp ./16.1/ip/altera/rapidio/lib/rio/hw/src/test/tb.ser_demo/run_modelsim_verilog.erp ./16.1/ip/altera/rapidio/lib/rio/hw/src/test/tb.par_demo/run_modelsim_vhdl.erp ./16.1/ip/altera/rapidio/lib/rio/hw/src/test/tb.par_demo/run_modelsim_verilog.erp ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/verilog/pci_mt64/example/run_modelsim_altera.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/verilog/pci_mt64/example/run_modelsim.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/verilog/pci_mt32/example/run_modelsim_altera.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/verilog/pci_mt32/example/run_modelsim.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/verilog/pci_t64/example/run_modelsim_altera.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/verilog/pci_t64/example/run_modelsim.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/verilog/pci_t32/example/run_modelsim_altera.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/verilog/pci_t32/example/run_modelsim.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/vhdl/pci_mt64/example/run_modelsim_altera.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/vhdl/pci_mt64/example/run_modelsim.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/vhdl/pci_mt32/example/run_modelsim_altera.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/vhdl/pci_mt32/example/run_modelsim.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/vhdl/pci_t64/example/run_modelsim_altera.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/vhdl/pci_t64/example/run_modelsim.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/vhdl/pci_t32/example/run_modelsim_altera.tcl ./16.1/ip/altera/pci_compiler/megawizard_flow/testbench/vhdl/pci_t32/example/run_modelsim.tcl ./16.1/quartus/sopc_builder/bin/run_modelsim.pl ./16.1/quartus/sopc_builder/bin/europa/e_modelsim.pm ./16.1/quartus/common/help/webhelp/eda/simulation/modelsim ./16.1/quartus/common/tcl/internal/nativelink/modelsim.tcl ./16.1/quartus/linux64/modelsim_q.tcl ./16.1/logs/modelsim_ase-16.1.0.196-linux-install.log ./16.1/modelsim_ase ./16.1/modelsim_ase/modelsim.ini ./16.1/modelsim_ase/docs/pdfdocs/modelsim_user.pdf ./16.1/modelsim_ase/docs/pdfdocs/modelsim_gui_ref.pdf ./16.1/modelsim_ase/docs/pdfdocs/modelsim_tut.pdf ./16.1/modelsim_ase/docs/pdfdocs/modelsim_ref.pdf ./16.1/modelsim_ase/docs/pdfdocs/_bk_modelsim.pdf ./16.1/modelsim_ase/vhdl_src/modelsim_lib ./16.1/modelsim_ase/modelsim_lib ./16.1/modelsim_ase/examples/gui/addmenu/modelsim.tcl ./16.1/modelsim_ase/linuxaloem/echkpnt.modelsim ./16.1/modelsim_ase/linuxaloem/erestart.modelsim ./16.1/modelsim_ase/tcl/bitmaps/modelsim3_de_lg.gif ./16.1/modelsim_ase/tcl/bitmaps/modelsim3dark.gif ./16.1/modelsim_ase/tcl/bitmaps/modelsim3.gif ./16.1/modelsim_ase/tcl/bitmaps/modelsim3_de_dark.gif ./16.1/uninstall/modelsim_ase.cnf ./16.1/uninstall/modelsim_ase-16.1.0.196-linux-uninstall.run ./16.1/uninstall/modelsim_ase-16.1.0.196-linux-uninstall.dat -------------------------------------------------------------------------------------------------------- So, which file to run? Which one should I define in the 'Tools' -> 'Options' -> 'EDA Tool Options' category? How should look like the whole command? Thank you!