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Altera_Forum
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14 years ago

Modelsim resimulation after QuartusII synthesis

Hi all, I created a testbench for a VHDL module, then I simulated it with Modelsim. Now I have a problem: I synthesized the module with Quartus II, but now I've to do an after synthesis simula...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hey Itosone,

you can start modelsim simulation(native link feature) from quartus from Tools-> Run EDA Simualtion Tool -> EDA RTL Simulation menu. Notice that under Run EDA Simuation Tool menu, there are two sub menus, EDA RTL Simuation is for functional simulation, and EDA Gate Level Simulation is for Timing Simulation.

The *.vho files can be find in ../simulation/modelsim folder.