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Altera_Forum
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12 years ago

ModelSim incorrectly simulates FPGA design

My AHDL program runs as expected on my FPGA, but when I simulate it in ModelSim, the result is wacky. Tools/Equipment: Windows 7 Quartus II 32-bit v12.0 sp2 Web Edition ModelSim SE-64 10.0c,...
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Altera_Forum
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12 years ago

OK, thanks Tricky. Any tips on how to find a logic loop? Does ModelSim or Quartus come with any tools for this? Otherwise I have a lot of code to sift through.