Forum Discussion
Altera_Forum
Honored Contributor
7 years agoHi,
--- Quote Start --- I have tested the test bench with my logic and it works, I can simulate it with modelsim but when I put the FIFO Modelsim complains, I attach the transcript at the end of the post. --- Quote End --- Without code it is difficult to support, can you share your part of the code (after adding the FIFO & test bench)? Since it was worked before adding FIFO, It might have an issue while instantiating the “dcfifo_component”. Can you please refer the old thread & check any typo mistake, any missing port, signal declaration etc. https://www.alteraforum.com/forum/showthread.php?t=55761 Let me know if this has helped resolve the issue you are facing or if you need any further assistance. Best Regards Vikas Jathar (This message was posted on behalf of Intel Corporation)