RH0001
Occasional Contributor
Occasional ContributorModelsim design size limit buggy and or misleading in Quartus Lite 19.1
Hi, I am trying to simulate a small design totaling just 1025 lines of VHDL including the Megawizard parts & test bench YET Modelsim prints a warning # ** Warning: Design size of 17912 statements ex...
Hi RH,
I meant file in ModelSim work libraries.
- Reduce the size of the design (remove the ram and check)
- Neglect the warning, You can simulate the design but simulation may take time.
- Upgrade to Modelsim from SE to FE
https://www.intel.com/content/www/us/en/software/programmable/quartus-prime/model-sim.html
Regards
Anand
