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Altera_Forum
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17 years ago

modelsim analog waveform transients

I'm using modelsim-Altera to make a gate-level simulation of an own ifft core, the target platform is an Stratix II FPGA. When i select the analog waveform display format for a signed 16 bits ...
Altera_Forum's avatar
Altera_Forum
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17 years ago

I didn't exactly understand what's the timing problem releated to memory operation. But if the data is stable a the clock edge, I meant you can simply add a register in your simulation, clocked from the said clock.

The user manual tells about an option to sample signals at a clock edge, but I'm not sure if it applies only to the list window or also to the waveform window.