Modelsim-altera starter - Instantiation of 'dcfifo' failed. The design unit was not f

I am compiling the existence codes and found dcfifo, pll component are instantiated there.

here is the dcfifo codes in side module.

dcfifo dcfifo_component (

.rdclk (rdclk),

.wrclk (wrclk),

.wrreq (wrreq),

.aclr (aclr),

.data (data),

.rdreq (rdreq),

.wrfull (sub_wire0),

.q (sub_wire1),

.rdempty (sub_wire2),

.wrusedw (sub_wire3),

.rdusedw (sub_wire4),

.rdfull (),

.wrempty ());

defparam

dcfifo_component.intended_device_family = "Cyclone V",

dcfifo_component.lpm_hint = "RAM_BLOCK_TYPE=M10K",

dcfifo_component.lpm_numwords = 512,

dcfifo_component.lpm_showahead = "OFF",

dcfifo_component.lpm_type = "dcfifo",

dcfifo_component.lpm_width = 16,

dcfifo_component.lpm_widthu = 9,

dcfifo_component.overflow_checking = "ON",

dcfifo_component.rdsync_delaypipe = 4,

dcfifo_component.read_aclr_synch = "OFF",

dcfifo_component.underflow_checking = "ON",

dcfifo_component.use_eab = "ON",

dcfifo_component.write_aclr_synch = "OFF",

dcfifo_component.wrsync_delaypipe = 4;

endmodule

Should I generate them(dcfifo and pll)?

any procedure to compile them after generation ?

Instantiation of 'altera_pll' failed. The design unit was not found.

Instantiation of 'dcfifo' failed. The design unit was not found.

Regards

Vraifluss