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Altera_Forum
Honored Contributor
16 years ago --- Quote Start --- Hello folks, I am trying out the new ModelSim-Altera 6.5b since it allows use of Verilog testbenches. When I used the Quartus II internal simulator all the CPLD internal delays were included in the simulation - how do I get the CPLD delays annotated when using the ModelSim simulator ? Thanks in advance for the help everbody, hope your Monday is going ok. Cheers, Eric --- Quote End --- Hi, you have to specify under EDA tool settings Modelsim as your simulation tool. By doing this Quartus generates a <>.vo and a <>.sdo file. The sdo file contains the timing informations. Kind regard GPK