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DmitryKo
New Contributor
New ContributorMessage Waiting for clock in Signal tap for input external clock
Hi, all I am using Quartus Prime Standard Edition version 16.1.2 Build 203 Device Cyclone V 5CEBA8F23C8 Approximately in more than 50 % of compilations of my project I got message Waiting for cl...
DmitryKoNew Contributor
New ContributorThis is custom board.
I found the reason and solution.
Clock from external board is routed to 4 input pins of FPGA, but used in the FPGA only one from them.
The solution: define rest pins as inputs in Pin Planner. Input pins were connected to external signal but not defined in Pin Planner.
Thank you to all.
