Max+Plus II to Quartus, EPM7192

Recent versions of quartus have been producing different logic based on sensitivity lists. But Im guessing with and old part, you are also using an old version of quartus.

If you do have a change in sensitivity list to work around an error - I suspect the code is rather poorly written. How about posting the code here?

On a related max+plus 2 compile issues - I once compiled code for an old Flex10k that would compile and work just fine in Max+Plus2, but Quartus complained some memories were being connected illegally. We just stuck with max+plus 2. It's VHDL compile is very rubbish, but with legacy designs its often best to stick with legacy tools, usually due too all the (now considered) poor practices used to make the thing actually work.