Master Addressing Issues

Masters use byte addressing and slaves use word addressing (typically). Qsys lets you use any combination of byte/word addressing for masters and slaves but the defaults are masters--> byte, slaves --> word for historical (SOPC Builder) reasons.

So your master presents a byte address to the fabric and by the time the address arrives to the slave interface it should be a word offset into the slave address space. So for example if I wanted a 32-bit master to access the four words of a 32-bit memory living at address 0x1000 I would expect this:

 
Master Address     Slave Address
0x1000                0x0
0x1004                0x4
0x1008                0x8
0x100C                0xC

The byte enables that reach the slave interface tell the slave which bytes are being accessed within a word.