Forum Discussion
Hello Farabi,
thank you for the hints!
One question: are you an Altera employee so your answers I can assume as official answers or shall I wait more for them too?
If I understand your suggestions correctly all the 3 related to:
1) enable AXI, use 32bit word indirect transfers and align this external memory to 8 bytes, etc...
I checked the Avalon bus parameters it there it seems it is not supporting indirect transfers with this IP.
And AXI is used only for the acceleration engine, which (I believe) has no role in loading compact certificates.
I would find it strange that SDM implement such sophisticated security features and would restrict me to use it only in HPS versions. That does not make any sense to me, anti rollback protection is needed with normal fpga images, what if someone implement ad absurdum a nios processor or such?! or just simply wants their normal fpga logic to be properly protected. The whole point in Agilex3C -Z version is having config authentication/encryption, therefore anti-rollback is a crucial feature.
Thanks,
Peter