M_alu_result[10] was determined as clock . . . Why?!?

Hi,

the message is well understood. I'm just wondering why, when this is a QSYS design, QSYS does not write this clock definition to the SDC file.

It can be either that the SDC creation of QSYS is still just in some case of beta state or that QSYS itself is not aware that the design it creates leads to the assumption of TQ that some signal is used as a clock.

For me as the user of QSYS and TQ (and quiet not an expert as the subject is far too complex), I kind of relay on the tools, that they know what they are doing and that they prepare all recommended dependencies correctly.

I tried to evaluate why TQ thinks that this signal is a clock by using the report_timing command. I got some output from this, but I just didn't had the time to examine it because I have some kind of preassure on my main project which is to design a working firmware for our product.

In my opinion it is sufficient to assign the clock speed of 50MHz to this determined clock as this is the fastest clock in my design. So it should be fine under all circumstances, right?

Regards,

Maik