Forum Discussion
Altera_Forum
Honored Contributor
11 years agoPut your design together implementing the behaviour of the positive half of the output signal that you want driven out of an LVDS pair. In the 'Pin Planner' within Quartus, change the 'I/O Standard' of your output signal to LVDS, ensuring you specify a valid 'Location' - i.e. one that supports the LVDS standard, which will need to be in a bank powered at 2.5V.
Regards, Alex