Forum Discussion

David_MD_KIM's avatar
David_MD_KIM
Icon for New Contributor rankNew Contributor
7 years ago

LVDS IO error

Hi, again I try very simple case as attached. But It is same error result. Please advice how to interface lvds IO input by primitives Thanks
David_MD_KIM's avatar
David_MD_KIM
Icon for New Contributor rankNew Contributor
7 years ago

FPGA Part number is EP4CE15F17C8N (Cyclone iV)

However i find the reason that is naming of negative pin.

Whenever define one of differential pin, tool generate name(n) automatically.

After that i annotate back it to Design PIN.

This is error happen.

Can you teach me how to process differential PIN define correctly?

Thanks

David