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Altera_Forum
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10 years ago

LVDS Differential IO pin Mapping error

HI I have tried mapping Differential IO signals ADC_P to PIN_A29 and ADC_N to PIN_A28 using Tcl script In Quartus II 12.0 version. In tool Its automatically creating a differential pair for A...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Remove 'ADC_N' from your design (as well as the tcl script), only code for the positive half of 'ADC'. Then in the pin planner assign 'ADC' to pin A29 and select the differential I/O standard you require. Quartus will automatically assign the negative half to A28.

By adding 'ADC_N' Quartus thinks you've added another clock to your design.

Cheers,

Alex