LVDS Assignment in Quartus

Brad wrote:

"it is OK to have only the "p" leg of a differential pin pair in the source file and let the Fitter automatically create the pin for the "n" leg and place it in the correct location."

So, no reference to the "n" signal should appear in the logic or in a pin assignment?

Just make the pin assignment to "p" pin with an LVDS type and couple that with the logic level signal in the top level source file?

What about for outputs, does it work the same way just in reverse? Make the "p" pin assignment, couple it with the logic level signal name and QII will pick-up the "n" for you?

Thanks in advance,

BR