lpm_fifo instatiation: Logic Elements not consumed

Unfortunately, the example doesn't clarify, how the FIFO is connected in the design. Of course it is implemented, when connected directly to pins.

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Whereas, fifo output (q[7..0]) left with no connection or just connected with a bus is consuming only 20 LE

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That's what I already said before

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However, when not output signals depend on the FIFO module, respectively it has no effective input or clock, it will be always removed by the fitter.

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It's obvious, that the FIFO will be removed during synthesis, if the FIFO output is left with no connection. The more interesting question is, what means connected with a bus? If the FIFO output is influencing output signals indirectly through the bus, the FIFO is synthesized. Regarding your original question, if you expect, that the FIFO would used in the design, but the fitter removes it, you have proved, that the FIFO output is actually not used in your design, most likely due to a coding error.