Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

lpm_add_sub synthesis error on Q2 9.0 SP2

Hi

I am using lpm_add_sub in ACEX1K EP1K50TC144-1 and I am getting this warning during synthesis process. I am using Q2 9.0 SP2 due to ACEX1K device support.

Warning: Ignored 6 CARRY_SUM primitives -- cannot place fan-in logic in single logic cell

Warning: Can't place logic feeding CARRY_SUM primitive "abs3:$00041|lpm_add_sub:$00002|addcore:adder1_0[0]|a_csnbuffer:result_node|cs_buffer[3]" in single logic cell

Warning: Node "abs3:$00041|lpm_abs:$00000|lcarry[12]" of type CARRY_SUM

Warning: Node "abs3:$00041|lpm_add_sub:$00002|addcore:adder1_0[0]|a_csnbuffer:result_node|cs_buffer[2]" of type CARRY_SUM

..

..

Basically the lpm_add_sub was not successfully implemented in the design and the functional simulation fails as well.

I can get rid of this warning by ticking the "ignore carry buffer" in the synthesis option but the fmax seems to suffers.

Ahdl code calling lpm_add_sub as below

(abs_diff[], , /over_max) = lpm_add_sub ( , abs_in[], limit[],gnd,h1,, )

WITH (LPM_WIDTH = 14, LPM_PIPELINE=2, LPM_REPRESENTATION="unsigned");

anybody know why I have to enable "ignore carry buffer" to get this to work? it seems strange for altera's lpm function to have this issue

Thanks

Alan

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    On Flex 10k devices I sometimes had problems where Quartus would refuse to compile for something that was "illegal in the device" but Max Plus2 didnt have a problem. Have you tried older versions of quartus or max plus 2?

    As Acex is such an old part, and there are very few people that actually use AHDL any more (altera recommend you dont use it) you may struggle to get much help on the forum. Have you tried contacting altera mysupport?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Thanks Tricky , the code compile clean on Max+ II. It seems it is related to Quartus implementaion of lpm_add_sub instead of AHDL specific issue.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    I've filed this issue with my_support , lets hope they will be able to give some explanation.