Long runtimes for Quartus II

There are a couple more clues Quartus is telling you, such as if it is burning its time in placement or routing, if the timing is dificult to meet, or if the part is too full or too empty. A quick idea is check that you have turned on Settings->Analysis & Synthesis Netlist optimizations -> WYSIWYG primitive resynthesis and gate level retiming. If Design compiler choose poorly these two options might fix it. There are also physical synthesis options, but they tend to slow down compiles in exchange for performance, generally speaking. When you do timing closure, you will often see the parts of the design that Quartus has a hard time with, and the appropriate pipeline stages or replicated logic may not only make the timing much easier to meet, but speed up placement.