Honored Contributor
Honored ContributorI don't look at it too closely, but would be surprised if the name really changed from compile to compile. I thought it would be based on the signal driving it, whcih would be pretty constant.
Also, just because it's an ASIC doesn't mean you can't instantiate and ALTCLKCTRL and then bypass it in the other mode. One thing you could try is instantiate a function(my_altclkctrl or something) and when targeting the FPGA, read in the megafunction you created for this block, and for the ASIC read in a logic that just passes the signal through. There are all sorts of ways, which I'm sure you know more than me, that should accomplish this.
