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RRomano001's avatar
RRomano001
Icon for Contributor rankContributor
6 years ago

Linux Qsys Now "platform designer", ALT_PLL Altera FPGA IP doesn't save, crash.

Linux Qsys Now "platform designer", from old time still has trouble never addressed. ALT_PLL Altera FPGA IP open in a small window with scroll bar, if something is touched in this state after long ...
FH_'s avatar
FH_
Icon for New Contributor rankNew Contributor
4 years ago

Hello, I know this is quite an old thread, nevertheless I have the exact same problem with the Platform Designer. I tested versions 18.1 and 20.1 (Standard edition) with the exact same behavior. It is not possible to add an ALTPLL component in the Platform Designer. The wizard appears (you then have to resize it, otherwise it will crash), you can make your adjustments an when you click finish nothing happens, no error message nothing.

When opening a QSYS file that already contains a PLL, it is possible to open the settings (i.e., the Mega Wizard) but changes have no effect.

Is Quartus under Linux. Are there any suggestions how to work around this problem?

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    4 years ago

    You probably should start a new thread on this.

    New components get added to the bottom of the System View (System Contents). You don't see it anywhere and no messages in the Messages window about it?