YES YES YES ! with your previous code, you are right.
Sorry I hadn't read the whole code.
A common mistake for beginner is
...
SIGNAL sig : std_ulogic_vector(3 downto 0) := "0000";
PROCESS (clk)
BEGIN
If rising_edge(clk) THEN
sig <= "1010"; -- sig will be affected at the end on the process, so here at the first clk edge,
-- sig still equals to "0000" for this time !
IF sig = "1010" then
-- instructions here
-- that are NOT executed because sig = "0000"
-- will be executed at the next clk edge
ELSE
-- instructions that will be executed the first time
END IF;
END IF;
END PROCESS;