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Altera_Forum's avatar
Altera_Forum
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17 years ago

It adds 3 and subtracts 1 instead of adding just 1

Hi! I'm pretty new with vhdl and Quartus II and maybe this question is too obvious, but I spent three days on it and I cannot understand yet why is not working... I made a silly program, just addi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

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So, if I remove the default value on definition, I can use the reset circuit, in order to force an initial reset and so set al the values then, maybe it is more accurate...

Do you know why it happens so? the warning only refers to the starting point? so default values are not good to use?

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To be hoenst I don't know, because I'm not an VHDL expert. I always use Verilog for my designs. At least I assume your design is running now.