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Altera_Forum
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14 years ago

Issues with Avalon burst adapter in SOPC

I have an Avalon master with a 32-bit data bus connected to an Avalon slave with a 64-bit data bus. SOPC builder allows me to do this, and automatically inserts a sopc_system_burst module between these two interfaces.

When the master issues a burst write command, the auto generated SOPC module breaks up the burst into individual 1-word accesses, severely reducing the throughput. Is this the expected behavior? Or should the module correctly convert my 32-bit burst into an equivalent 64-bit burst?

I did notice that burst reads are converted without a problem. Anyone have any ideas why the burst writes are not working across different data-widths?

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    This behavior is expected, there is no packing logic built into the fabric. The reason why you see it for reads is that it is just as easy to perform a wide read than two narrow ones, but this is not the case for writes.

    If you need high bandwidth I would either increase the master width or use a half-rate bridge (which does the packing that you are looking for).
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Thanks for your response.

    The half-rate bridge isn't quite what I want - it converts single accesses into half-wide bursts, and cannot convert burst accesses into wider burst accesses.

    I'd be curious to know if the Qsys Merlin Burst Adapter can deal with this situation (the documentation suggests that it can).
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Oops I meant 2x rate bridge (narrow to wide).

    It's been a while but last time I checked Qsys didn't support transaction packing. That may have changed by now but I haven't seen it yet.
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    What is the 2x rate bridge? Is that a standard Altera SOPC component? I don't see any reference to it in the documentation or in the Altera library of memory mapped components.

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    There isn't one shipped in the ACDS but I think there was one floating around somewhere (hopefully not in the old Nios II forum that crashed....) Building a 2x bridge is pretty easy to do manually though. You just store multiple beats inside the bridge and glue them together into a single wide access. The tricky part is to implement a timeout mechanism in case the additional beats never arrive (don't want to stall forever).

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    I put together a simple test system in Qsys and I can confirm that the burst adapter it uses *does* perform the proper narrow-to-wide burst conversion. It does not break up the bursts into single accesses like it does in SOPC.