Issue when converting between multiple data types

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use ieee.numeric_std.all;

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The thing is that I am using IEEE.NUMERIC_STD.ALL

EDIT: I casted the std_logic_vector to unsigned and then integer. It created a bsf but now I will test synthesis

EDIT2: I got this error during synthesis

Error (10779): VHDL error at ALUVHDL_entities.vhd(896): expression is not constant