Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Is there any limitation of the sample clock of SignaltapII

I remember that this clock can't be higher than 175Mhz, am i right? But, I used much higher than 175MHz clock as the sample clock of SiganltapII in many cases. However, i met a problem when i u...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

I attached 2 jpg file.

The first is my PLL, c3 output is as my signaltap's sample clock. c0 and c1 are 100Mhz output. c2 is 40Mhz, c4 is 10Mhz.

I add c0,c2 and c4 into signaltap, when setting c3 to 200Mhz, the signaltap didn't work as attached file shows. But when setting c3 to 300Mhz, the signaltap run well.