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Altera_Forum's avatar
Altera_Forum
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12 years ago

Is there a way to use design level names with 'get_pins' when creating constraints?

Hello, I am trying to create timing constraints for my design in an SDC, but am having trouble getting 'get_pins' to filter the correct nodes. By that I mean, it won't find any because the name...
Altera_Forum's avatar
Altera_Forum
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12 years ago

This thread has some discussions about using TimeQuest for accessing nodes within the design;

http://www.alteraforum.com/forum/showthread.php?t=39233

I also found that the RTL netlist API was able to view nodes that were not present in the SDC netlist. However, adding 'keep' synthesis constraints to the design preserved some nodes in the SDC netlist.

Perhaps that thread will provide some ideas.

Cheers,

Dave