Is there a performance difference between variables vs direct assignments

As pointed out, any difference between variable and signal is not matter of which is better but the final inferred logic/registers could be different and functionality may change.

Here is my view of variable Versus signal away from process update mindset (needs some work to prove it).

Example 1:

(i) count <= count + 1;

count is inferred as register. An adder of 1 plus this register's output is wired back into its input

(ii) count := count + 1;

count is never a register but a register is needed after it since its previous value need be stored but

this register is not known by name count to the tool

The final inferred structure of above two cases i&ii of counting is identical:

Example 2:

(i)

D <= A;

A := B + C;

A is never a register (just output of adder B + C

D is register on its own and acquires old value of A.

Hence there would be a register after A but not known as A to the tool. Thus D is a second register after the register put on A

B + C => A => register => register(D)

(ii)

A := B + C;

D <= A;

D acquires new value of A; Thus D is register after A directly

B + C => A => register(D)

So in short a variable allows combinatorial logic within clocked process that may or may not infer a register